This webpage may contain errors. Please do NOT trust the following list, although the maintainer has tried his best to correct the mistakes. If you find an error, please contact the maintainer via email at “contact [at] ishikawa.cc”.

Highly contributed researchers in 1993

Masakazu Aoki (5)

IEEE Commun. Mag.

The TINA initiative

Authors: William J. Barr, Trevor Boyd, Yuji Inoue

Intelligent networking for the global marketplace

Authors: Stephen Chen, Masanobu Fujioka, Gerard O'Reilly

Broadband: the last mile

Authors: Donald E. A. Clarke and Tetsuya Kanada

Intelligent network overview

Authors: James J. Garrahan, Peter A. Russo, Kenichi Kitami, Roberto Kung

IN rollout in Japan

Author: Shigehiko Suzuki

ATM VP-based broadband networks for multimedia services

Authors: Tomonori Aoyama, Ikuo Tokizawa, Ken-ichi Sato

Globalizing IN for the new age

Authors: Masanobu Fujioka, Hiroyuki Kikuta, Seiichiro Sakai, Yasushi Wakahara

A new architecture of photonic ATM switches

Authors: Makoto Nishio, Shuji Suzuki, Kazuo Takagi, Ichiro Ogura, Takahiro Numai, Kenichi Kasahara, Kazuhisa Kaede

A method for detecting service interactions

Authors: Yasushi Wakahara, Masanobu Fujioka, Hiroyuki Kikuta, Hikaru Yagi, Seiichiro Sakai

A systematic approach to intelligent building design

Authors: Moriaki Azegami and Hideaki Fujiyoshi

Internetworked PBX-computer systems for intelligent building applications

Authors: Mamoru Ishibashi, Kazuo Ishikawa, Tomonori Hira, Masaya Ito

Virtual offices

Authors: Tomio Kishimoto and Gen Suzuki

Systems evolution in intelligent buildings

Authors: Akihiko Kujuro and Hiroshi Yasuda

A synchronous digital hierarchy network management system

Authors: Toshinari Kunieda, Satoru Sugimoto, Noriyuki Sasaki

This list is based on the data extracted from dblp: IEEE Commun. Mag.

IEEE J. Sel. Areas Commun.

The Washington University Broadband Terminal

Authors: William D. Richard, Pierre Costa, Ken-ichi Sato

Distributed Multilink System for Very-High-Speed Data Link Control

Authors: Takeshi Akaike, Keiji Ishikawa, Koichi Saito, Michiharu Mito

Security Analysis of the INTELSAT VI and VII Command Network

Authors: Raymond L. Pickholtz, David B. Newman Jr., Ya-Qin Zhang, Makoto Tatebayashi

A Simple ID-Based Scheme for Key Sharing

Authors: Shigeo Tsujii, Jinhui Chao, Kiyomiche Araki

Fiber-Optic Microcell Radio Systems with a Spectrum Delivery Scheme

Authors: Ryutaro Ohmoto, Hiroyuki Ohtsuka, Hirofumi Ichikawa

Optical Fiber Feeder for Microcellular Mobile Communication Systems (H-015)

Authors: Makoto Shibutani, Toshihito Kanai, Watani Domom, Katsumi Emura, Junji Namiki

This list is based on the data extracted from dblp: IEEE J. Sel. Areas Commun.

IEEE J. Solid State Circuits

BiCMOS circuit technology for high-speed DRAMs

Authors: Shigeyoshi Watanabe, Koji Sakui, Tsuneaki Fuse, Takahiko Hara, Seiichi Aritome, Katsuhiko Hieda

A self-learning digital neural network using wafer-scale LSI

Authors: Moritoshi Yasunaga, Noboru Masuda, Masayoshi Yagyu, Mitsuo Asai, Katsunari Shibata, Mitsuo Ooyama, Minoru Yamada, Takahiro Sakaguchi, Masashi Hashimoto

A 320 MFLOPS CMOS floating-point processing unit for superscalar processors

Authors: Nobuhiro Ide, Hiroto Fukuhisa, Yoshihisa Kondo, Takeshi Yoshida, Masato Nagamatsu, Junji Mori, Itaru Yamazaki, Kiyoyi Ueno

A VLSI chip set for a large-scale parallel inference machine: PIM/m

Authors: Hirohisa Machida, Hideki Ando, Kenichi Yasuda, Kiyohiro Furutani, Yukihiro Yamashita, Hiroshi Nakashima, Yasutaka Takeda, Katsuto Nakajima, Masayoshi Sakao, Masao Nakaya

Circuits to reduce distortion in the diode-bridge track-and-hold

Authors: Tsutomu Wakimoto and Yukio Akazawa

A 10 b 50 MHz pipelined CMOS A/D converter with S/H

Authors: Michio Yotsuyanagi, Toshiyuki Etoh, Kazumi Hirata

Low-power 1/2 frequency dividers using 0.1- mu m CMOS circuits built with ultrathin SIMOX substrates

Authors: Minoru Fujishima, Kunihiro Asada, Yasuhisa Omura, Katsutoshi Izumi

A 1-GHz/0.9-mW CMOS/SIMOX divide-by-128/129 dual-modulus prescaler using a divide-by-2/3 synchronous counter

Authors: Yuichi Kado, Masao Suzuki, Keiichi Koike, Yasuhisa Omura, Katsutoshi Izumi

A 10-b 300-MHz interpolated-parallel A/D converter

Authors: Hiroshi Kimura, Akira Matsuzawa, Takashi Nakamura, Shigeki Sawada

A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture

Authors: Tsuguo Kobayashi, Kazutaka Nogami, Tsukasa Shirotori, Yukihiro Fujimoto

A 500-megabyte/s data-rate 4.5 M DRAM

Authors: Natsuki Kushiyama, Shigeo Ohshima, Don Stark, Hiroyuki Noji, Kiyofumi Sakurai, Satoru Takase, Torhu Furuyama, Richard M. Barth, Andy Chan, John Dillon, James A. Gasbarro, Matthew M. Griffin, Mark Horowitz, Thomas H. Lee, Victor Lee

A Si bipolar 1.4-GHz time space switch LSI for B-ISDN

Authors: Osamu Matsuda, Shin-ichiro Hayano, Takao Takeuchi, Hideki Kitahata, Hisashi Takemura, Tsutomu Tashiro

Sub-1-V swing internal bus architecture for future low-power ULSIs

Authors: Yoshinobu Nakagome, Kiyoo Itoh, Masanori Isoda, Kan Takeuchi, Masakazu Aoki

A 6-ns 1-Mb CMOS SRAM with latched sense amplifier

Authors: Teruo Seki, Eisaku Itoh, Chiaki Furukawa, Isamu Maeno, Tadashi Ozawa, Hiroyuki Sano, Noriyuki Suzuki

Low-voltage ULSI design

Authors: Katsuhiro Shimohigashi and Koichi Seki

Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits

Authors: David K. Su, Marc J. Loinaz, Shoichi Masui, Bruce A. Wooley

Low-power on-chip supply voltage conversion scheme for ultrahigh-density DRAMs

Authors: Daisaburo Takashima, Shigeyoshi Watanabe, Tsuneaki Fuse, Kazumasa Sunouchi, Takahiko Hara

Design techniques for high-throughput BiCMOS self-timed SRAMs

Authors: Koichi Yokomizo and Kuniyoshi Naito

A high-speed, small-area, threshold-voltage-mismatch compensation sense amplifier for gigabit-scale DRAM arrays

Authors: Takayuki Kawahara, Takeshi Sakata, Kiyoo Itoh, Yoshiki Kawajiri, Takesada Akiba, Goro Kitsukawa, Masakazu Aoki

A 622-Mb/s 8*8 ATM switch chip set with shared multibuffer architecture

Authors: Harufusa Kondoh, Hiromi Notani, Hideaki Yamanaka, Keiichi Higashitani, Hirotaka Saito, Isamu Hayashi, Shigeki Kohama, Yoshio Matsuda, Kazuyoshi Oshima, Masao Nakaya

A stable high-order delta-sigma modulator with an FIR spectrum distributor

Authors: Toshiyuki Okamoto, Yuichi Maruyama, Akira Yukawa

A 9.6-Gb/s HEMT ATM switch LSI with event-controlled FIFO

Authors: Yuu Watanabe, Yasuhiro Nakasha, Yuji Kato, Kohichiro Odani, Masayuki Abe

A 20-Gb/s flip-flop circuit using direct-coupled FET logic

Authors: Makoto Shikata, Koutarou Tanaka, Hiromi T. Yamada, Hiroki I. Fujishiro, Seiji Nishi, Chouho Yamagishi, Masahiro Akiyama

A 1.9-GHz-band GaAs direct-quadrature modulator IC with a phase shifter

Authors: Kazuya Yamamoto, Kosei Maemura, Naoto Andoh, Yasuo Mitsui

An experimental DRAM with a NAND-structured cell

Authors: Takehiro Hasegawa, Daisaburo Takashima, Ryu Ogiwara, Masako Ohta, Shinichiro Shiratake, Takeshi Hamamoto, Takashi Yamada, Masami Aoki, Shigeru Ishibashi, Yukihito Oowaki, Shigeyoshi Watanabe, Fujio Masuoka

Subthreshold current reduction for decoded-driver by self-reverse biasing (DRAMs)

Authors: Takayuki Kawahara, Masashi Horiguchi, Yoshiki Kawajiri, Goro Kitsukawa, Tokuo Kure, Masakazu Aoki

256-Mb DRAM circuit technologies for file applications

Authors: Goro Kitsukawa, Masashi Horiguchi, Yoshiki Kawajiri, Takayuki Kawahara, Takesada Akiba, Yasushi Kawase, Toshikazu Tachibana, Takeshi Sakai, Masakazu Aoki, Syoji Shukuri, Kazuhiko Sagara, Ryo Nagai, Yuzuru Ohji, Nono Hasegawa, Natsuki Yokoyama, Teruaki Kisu, Hisaomi Yamashita, Tokuo Kure, Takashi Nishida

A 1.71-million transistor CMOS CPU chip with a testable cache architecture

Authors: Yuichi Saito, Yukihiko Shimazu, Tom Shimizu, Kenji Shirai, Isao Fujioka, Yoshitetsu Nishiwaki, Junichi Hinata, Yoshiki Shimotsuma, Masayoshi Sakao

A 2/3-in 400k-pixel sticking-free stack-CCD image sensor

Authors: Michio Sasaki, Hisanori Ihara, Yoshiyuki Matsunaga

A 16-Mb CMOS SRAM with a 2.3- mu m2 single-bit-line memory cell

Authors: Katsuro Sasaki, Kiyotsugu Ueda, Koichi Takasugi, Hiroshi Toyoshima, Koichiro Ishibashi, Toshiaki Yamanaka, Naotaka Hashimoto, Nagatoshi Ohki

A 9-ns 16-Mb CMOS SRAM with offset-compensated current sense amplifier

Authors: Katsunori Seno, Kurt Knorpp, Lee-Lean Shu, Naoki Teshima, Hiroki Kihara, Hiroshi Sato, Fumio Miyaji, Minoru Takeda, Masayoshi Sasaki, Yoichi Tomo, Patrick T. Chuang, Kazuyoshi Kobayashi

A 30-ns 256-Mb DRAM with a multidivided array structure

Authors: Tadahiko Sugibayashi, Toshio Takeshima, Isao Naritake, Tatsuya Matano, Hiroshi Takada, Yoshiharu Aimoto, Koichiro Furuta, Mamoru Fujita, Takanori Saeki, Hiroshi Sugawara, Tatsunori Murotani, Naoki Kasai, Kentaro Shibahara, Ken Nakajima, Hiromitsu Hada, Takehiko Hamada, Naoaki Aizaki, Takemitsu Kunio, Eiichiro Kakehashi, Katsuhiro Masumori, Takaho Tanigawa

A 1.5-ns 32-b CMOS ALU in double pass-transistor logic

Authors: Makoto Suzuki, Norio Ohkubo, Toshinobu Shinbo, Toshiaki Yamanaka, Akihiro Shimizu, Katsuro Sasaki, Yoshinobu Nakagome

A single-bit-line cross-point cell activation (SCPA) architecture for ultra-low-power SRAMs

Authors: Motomu Ukita, Shuji Murakami, Tadato Yamagata, Hirotada Kuriyama, Yasumasa Nishimura, Kenji Anami

A circuit technology for high-speed battery-operated 16-Mb CMOS DRAMs

Authors: Hiroyuki Yamauchi, Toshikazu Suzuki, Akihiro Sawada, Tohru Iwata, Toshiaki Tsuji, Masashi Agata, Takashi Taniguchi, Yoshinori Odake, Kazuyuki Sawada, Teruhito Ohnishi, Masanori Fukumoto, Tsutomu Fujita, Michihiro Inoue

A 300-MHz 16-b BiCMOS video signal processor

Authors: Toshiaki Inoue, Junichi Goto, Masakazu Yamashina, Kazumasa Suzuki, Masahiro Nomura, Youichi Koseki, Tohru Kimura, Takao Atsumo, Masato Motomura, Benjamin S. Shih, Tadahiko Horiuchi, Nobuhisa Hamatake, Kouichi Kumagai, Tadayoshi Enomoto, Hachiro Yamada, Masahide Takada

A 2.5-V active low-pass filter using all-n-p-n Gilbert cells with a 1-Vp-p range

Authors: Mikio Koyama, Tadashi Arai, Hiroshi Tanimoto, Yoshihiro Yoshida

A 10-b 20-MHz 30-mW pipelined interpolating CMOS ADC

Authors: Keiichi Kusumoto, Akira Matsuzawa, Kenji Murata

A monolithic analog video comb filter in 1.2- mu m CMOS

Authors: Ken A. Nishimura and Paul R. Gray

A 5.8-ns 256-Kb BiCMOS TTL SRAM with T-Shaped bit line architecture

Authors: Toru Shiomi, Tomohisa Wada, Shigeki Ohbayashi, Atsushi Ohba, Hiroki Honda, Yoshiyuki Ishigaki, Shiro Hine, Kenji Anami, Kimio Suzuki, Tadashi Sumi

A 10-b 100-Msample/s pipelined subranging BiCMOS ADC

Authors: Kazuya Sone, Yoshio Nishida, Naotoshi Nakadai

This list is based on the data extracted from dblp: IEEE J. Solid State Circuits

IEEE Trans. Autom. Control.

Design of stable controllers attaining low Hinfinity weighted sensitivity

Authors: Hiroshi Ito, Hiromitsu Ohmori, Akira Sano

A note on Kharitonov's theorem

Authors: T. Auba and Yasuyuki Funahashi

A direct computation of state deadbeat feedback gains

Authors: Kenji Sugimoto, Akira Inoue, Shiro Masuda

Worst-case analysis and design of sampled-data control systems

Authors: Pierre T. Kabamba and Shinji Hara

Optimal service control of a station connected with two parallel substations

Authors: Naoto Miyoshi, Masamitsu Ohnishi, Norio Okino

Geometric structures of stable state feedback systems

Authors: Atsumi Ohara and Toshiyuk Kitamori

This list is based on the data extracted from dblp: IEEE Trans. Autom. Control.

IEEE Trans. Biomed. Eng.

An RF concentrating method using inductive aperture-type applicators

Authors: Yasuhiko Fujita, Hirokazu Kato, Tetsuya Ishida

Correction for apparent prolongation of mean transit time resulting from response time in a thermodilution system

Authors: Takashi Segawa, Michio Arakawa, Kenjiro Kambara, Hidetaka Miyazaki, Fumio Ando, Tomoo Kawada

A time domain approach for the fluctuation analysis of heart rate related to instantaneous lung volume

Authors: Kazuo Yana, J. Philip Saul, Ronald D. Berger, Michael H. Perrott, Richard J. Cohen

Real-time cardiac output estimation of the circulatory system under left ventricular assistance

Authors: Makoto Yoshizawa, Hiroshi Takeda, Makoto Miura, Tomoyuki Yambe, Yoshiaki Katahira, Shin-ichi Nitta

Control strategies for arterial blood pressure regulation

Authors: Satoru Isaka and Anthony V. Sebald

Compressing data volume of left ventricular cineangiograms

Authors: Kazuo Toraichi, Takahiko Horiuchi, Rudolf E. Kalman, Yasuhiro Ohtaki, Humihiko Nagasaki

A robust controller for insulin pumps based on H-infinity theory

Authors: Karl Heinz Kienitz and Takashi Yoneyama

On-line determination of pulmonary blood flow using respiratory inert gas analysis

Authors: Kezheng Gan, Isao Nishi, Ian Chin, Arthur S. Slutsky

A new method for measuring small local vibrations in the heart using ultrasound

Authors: Hiroshi Kanai, Hiroaki Satoh, Kouichi Hirose, Noriyoshi Chubachi

This list is based on the data extracted from dblp: IEEE Trans. Biomed. Eng.

IEEE Trans. Circuits Syst. Video Technol.

Variable-bit-rate HDTV codec with ATM-cell-loss compensation

Authors: Taizo Kinoshita, Tomoko Nakahashi, Masanori Maruyama

ATM networking and video-coding techniques for QOS control in B-ISDN

Authors: Katsuyuki Yamazaki, Masahiro Wada, Yasuhiro Takishima, Yasushi Wakahara

Adaptation of the MPEG video-coding algorithm to network applications

Authors: Masahisa Kawashima, Cheng-Tie Chen, Fure-Ching Jeng, Sharad Singhal

This list is based on the data extracted from dblp: IEEE Trans. Circuits Syst. Video Technol.

IEEE Trans. Commun.

Shared buffer memory switch for an ATM exchange

Authors: Noboru Endo, Takahiko Kozaki, Toshiya Ohuchi, Hiroshi Kuwahara, Shinobu Gohara

Analysis of modified Erlangian input single-server model, Ek/G/1

Authors: Takashi Okuda, Haruo Akimaru, Fumiaki Nakao

Novel Viterbi decoder VLSI implementation and its performance

Authors: Shuji Kubota, Shuzo Kato, Tsunehachi Ishitani

Adaptive DCT coding of video signals

Author: Hirohisa Yamaguchi

Waiting time and queue length distributions for go-back-N and selective-repeat ARQ protocols

Authors: Masakazu Yoshimoto, Tetsuya Takine, Yutaka Takahashi, Toshiharu Hasegawa

This list is based on the data extracted from dblp: IEEE Trans. Commun.

IEEE Trans. Computers

Notes on Multiple Input Signature Analysis

Authors: Tiko Kameda, Slawomir Pilarski, Andr Ivanov

Minimization of AND-EXOR Expressions Using Rewrite Rules

Authors: Daniel Brand and Tsutomu Sasao

Availability of k-Coterie

Authors: Hirotsugu Kakugawa, Satoshi Fujita, Masafumi Yamashita, Tadashi Ae

This list is based on the data extracted from dblp: IEEE Trans. Computers

IEEE Trans. Control. Syst. Technol.

MIMO furnace control with neural networks

Authors: Marzuki Khalid, Sigeru Omatu, Rubiyah Yusof

This list is based on the data extracted from dblp: IEEE Trans. Control. Syst. Technol.

IEEE Trans. Geosci. Remote. Sens.

This list is based on the data extracted from dblp: IEEE Trans. Geosci. Remote. Sens.

IEEE Trans. Ind. Electron.

VSS type self-tuning control

Author: Katsuhisa Furuta

Sliding mode controller design based on fuzzy inference for nonlinear systems [power systems]

Authors: Atsushi Ishigame, Tadashi Furukawa, Shunji Kawamoto, Tsuneo Taniguchi

Robust force control based on compensation for parameter variations of dynamic environment

Authors: Satoshi Komada, Koichi Nomura, Muneaki Ishida, Takamasa Hori

Variable-structured robust controller by fuzzy logic for servomotors

Authors: Amin Suyitno, Jun Fujikawa, Kazuhiro Kobayashi, Yasuhiko Dote

Torque sensorless control in multidegree-of-freedom manipulator

Authors: Toshiyuki Murakami, Fangming Yu, Kouhei Ohnishi

Robust speed control of IM with torque feedforward control

Authors: Makoto Iwasaki and Nobuyuki Matsui

This list is based on the data extracted from dblp: IEEE Trans. Ind. Electron.

IEEE Trans. Inf. Theory

Phased burst error-correcting array codes

Authors: Rodney M. Goodman, Robert J. McEliece, Masahiro Sayano

On the converse theorem in statistical hypothesis testing

Authors: Kenji Nakagawa and Fumio Kanaya

On complexity of trellis structure of linear block codes

Authors: Tadao Kasami, Toyoo Takata, Toru Fujiwara, Shu Lin

Reducing elliptic curve logarithms to logarithms in a finite field

Authors: Alfred Menezes, Tatsuaki Okamoto, Scott A. Vanstone

This list is based on the data extracted from dblp: IEEE Trans. Inf. Theory

IEEE Trans. Neural Networks

A noise suppressing distance measure for competitive learning neural networks

Authors: Ferdinand Peper, Mehdi N. Shirazi, Hideki Noda

Chaos and fractals from a forced artificial neural cell

Authors: Toshimichi Saito and Masami Oikawa

Reduction of required precision bits for back-propagation applied to pattern recognition

Authors: Shigeo Sakaue, Toshiyuki Kohda, Hiroshi Yamamoto, Susumu Maruno, Yasuharu Shimeki

A single 1.5-V digital chip for a 106 synapse neural network

Authors: Takao Watanabe, Katsutaka Kimura, Masakazu Aoki, Takeshi Sakata, Kiyoo Ito

The capacity of associative memories with malfunctioning neurons

Authors: Mahdad Nouri Shirazi and Sadao Maekawa

This list is based on the data extracted from dblp: IEEE Trans. Neural Networks

IEEE Trans. Parallel Distributed Syst.

A Theory of Coteries: Mutual Exclusion in Distributed Systems

Authors: Toshihide Ibaraki and Tiko Kameda

Making Compaction-Based Parallelization Affordable

Authors: Toshio Nakatani and Kemal Ebcioglu

This list is based on the data extracted from dblp: IEEE Trans. Parallel Distributed Syst.

IEEE Trans. Robotics Autom.

Dynamic control of a manipulator with passive joints in operational space

Authors: Hirohiko Arai, Kazuo Tanie, Susumu Tachi

A torque sensing technique for robots with harmonic drives

Authors: Minoru Hashimoto, Yoshihide Kiyosawa, Richard P. Paul

A modified Stewart platform manipulator with improved dexterity

Authors: Robert S. Stoughton and Tatsuo Arai

Exploiting nonholonomic redundancy of free-flying space robots

Authors: Yoshihiko Nakamura and Ranjan Mukherjee

A tactile sensor system for universal joint sections of manipulators

Authors: Yoji Yamada, Kazuhisa Shin, Nuio Tsuchida, Mataji Komai

Optimal design of robot accuracy compensators

Authors: Hanqi Zhuang, Zvi S. Roth, Fumio Hamano

This list is based on the data extracted from dblp: IEEE Trans. Robotics Autom.

IEEE Trans. Speech Audio Process.

Evaluation and optimization of perceptually-based ASR front-end

Authors: Jean-Claude Junqua, Hisashi Wakita, Hynek Hermansky

This list is based on the data extracted from dblp: IEEE Trans. Speech Audio Process.

IEEE/ACM Trans. Netw.

A copy network with shared buffers for large-scale multicast ATM switching

Authors: Wen-De Zhong, Jaidev Kaniyil, Yoshikuni Onozato

This list is based on the data extracted from dblp: IEEE/ACM Trans. Netw.

Proc. IEEE

Present status and future prospects for fuel cell power systems

Authors: Rioji Anahara, Sumio Yokokawa, Masahiro Sakurai

Reliability issues of flash memory cells

Authors: Seiichi Aritome, Riichiro Shirota, Gertjan Hemink, Tetsuo Endoh, Fujio Masuoka

Memory LSI reliability

Authors: Masao Fukuma, Hiroshi Furuta, Masahide Takada

VLSI reliability challenges: from device physics to wafer scale systems

Authors: Eiji Takeda, Kunihiko Ikuzaki, Hisao Katto, Yuzuru Ohji, Kenji Hinode, Akemi Hamada, Toshiyuki Sakuta, Takahiro Funabiki, Toshio Sasaki

Gigabit-density magnetic recording

Authors: Ching Tsang, Mao-Min Chen, Tadashi Yogi

Optical transport networks

Author: Tetsuya Miki

Very-high-speed optical signal processing

Authors: Sadakuni Shimada, Kiyoshi Nakagawa, Masatoshi Saruwatari, Takao Matsumoto

This list is based on the data extracted from dblp: Proc. IEEE