This webpage may contain errors. Please do NOT trust the following list, although the maintainer has tried his best to correct the mistakes. If you find an error, please contact the maintainer via email at “contact [at] ishikawa.cc”.

Highly contributed researchers in 1994

Masakazu Aoki (4)

Control algorithms of SONET integrated self-healing networks

Authors: Satoshi Hasegawa, Yasuyo Okanoue, Takashi Egawa, Hideki Sakauchi

An ATM VP-based self-healing ring

Authors: Yoshio Kajiyama, Nobuyuki Tokura, Katsuaki Kikuchi

Self-healing ATM networks based on virtual path concept

Authors: Ryutaro Kawamura, Ken-ichi Sato, Ikuo Tokizawa

Integrity of public telecommunications networks

Authors: Tsong-Ho Wu, John C. McDonald, T. P. Flanagan, Ken-ichi Sato

Guest editorial. Quality of telecommunications services, networks, and products

Authors: J. William Bowick, Koichi Asatani, William A. Hoberg, Henry A. Malec, Sinclair G. Stockman

In-service monitoring methods-better ways to assure service quality of digital transmission

Authors: Naoshi Sato, Koichi Asatani, Hideyo Murakami, Robert E. Mallon, Susan R. Hughes, Thomas L. Graff

Guest editorial. Code division multiple access networks. I

Authors: Ahmed K. Elhakeem, Donald L. Schiling, Paul W. Baier, Masao Nakagawa, A. Bush

A novel spread slotted Aloha system with channel load sensing protocol

Authors: Kiyoshi Toshimitsu, Takaya Yamazato, Masaaki Katayama, Akira Ogawa

Path diversity for FFH/PSK spread-spectrum communication systems

Authors: Yasushi Murata, Riaz Esmailzadeh, Keiji Takakusaki, Essam A. Sourour, Masao Nakagawa

A new IIR adaptive echo canceler: GIVE

Authors: Jinhui Chao, Shinobu Kawabe, Shigeo Tsujii

Quantizer neuron model and neuroprocessor-named quantizer neuron chip

Authors: Susumu Maruno, Toshiyuki Kohda, Hiroyuki Nakahira, Shiro Sakiyama, Masakatsu Maruyama

A subband adaptive filter allowing maximally decimation

Authors: Yoji Yamada, Hiroshi Ochi, Hitoshi Kiya

This list is based on the data extracted from dblp: IEEE J. Sel. Areas Communications

A high-density data-path generator with stretchable cells

Authors: Yoshiki Tsujihashi, Hisashi Matsumoto, Hidekatsu Nishimaki, Atsushi Miyanishi, Hiroomi Nakao, Osamu Kitada, Shuhei Iwade, Shinpei Kayano, Masayoshi Sakao

Offset compensating bit-line sensing scheme for high density DRAM's

Authors: Yohji Watanabe, Nobuo Nakamura, Shigeyoshi Watanabe

An adjustable output driver with a self-recovering Vpp generator for a 4M⨉16 DRAM

Authors: Kiyohiro Furutani, Hiroshi Miyamoto, Yoshikazu Morooka, M. Suwa, Hideyuki Ozaki

An outline font rendering processor with an embedded RISC CPU for high-speed hint processing

Authors: Tetsuro Kawata, Kenichi Kawauchi, Nobuaki Miyakawa, Ichiro Kawazome, Hiromi Yasumatsu, Susumu Haga, Masaya Takenaka

3.3-V BiCMOS circuit techniques for a 120-MHz RISC microprocessor

Authors: Fumio Murabayashi, Takashi Hotta, Shigeya Tanaka, Tatsumi Yamauchi, Hiromichi Yamada, Tetsuo Nakano, Yutaka Kobayashi, Tadaaki Bandoh

A 300-MHz 16-b 0.5-μm BiCMOS digital signal processor core LSI

Authors: Masahiro Nomura, Masakazu Yamashina, Junichi Goto, Toshiaki Inoue, Kazumasa Suzuki, Masato Motomura, Youichi Koseki, Benjamin S. Shih, Tadahiko Horiuchi, Nobuhisa Hamatake, Kouichi Kumagai, Tadayoshi Enomoto, Hachiro Yamada

A single poly EEPROM cell structure for use in standard CMOS processes

Authors: Katsuhiko Ohsaki, Noriaki Asamoto, Shunichi Takagaki

Design techniques for low-voltage high-speed digital bipolar circuits

Authors: Behzad Razavi, Yusuke Ota, Robert G. Swartz

MOSFET modeling for analog circuit CAD: problems and prospects

Authors: Yannis P. Tsividis and Ken Suyama

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation

Authors: Shigeru Atsumi, Masao Kuriyama, Akira Umezawa, Hironori Banba, Kiyomi Naruke, Seiji Yamada, Yoichi Ohshima, Masamitsu Oshikiri, Yohei Hiura, Tomoko Yamane, Kuniyoshi Yoshikawa

A 12.5-ns 16-Mb CMOS SRAM with common-centroid-geometry-layout sense amplifiers

Authors: Koichiro Ishibashi, Kunihiro Komiyaji, Sadayuki Morita, Toshiro Aoto, Shuji Ikeda, Kyoichiro Asayama, Atsuyosi Koike, Toshiaki Yamanaka, Naotaka Hashimoto, Haruhito Iida, Fumio Kojima, Koichi Motohashi, Katsuro Sasaki

A 1.5-ns cycle-time 18-kb pseudo-dual-port RAM with 9K logic gates

Authors: Masato Iwabuchi, Masami Usami, Masamori Kashiyama, Takashi Oomori, Shigeharu Murata, Toshiro Hiramoto, Takashi Hashimoto, Yasuhiro Nakajima

Memory array architecture and decoding scheme for 3 V only sector erasable DINOR flash memory

Authors: Shin'ichi Kobayashi, Hiroaki Nakai, Yuichi Kunori, Takeshi Nakayama, Yoshikazu Miyawaki, Yasushi Terada, Hiroshi Onoda, Natsuo Ajika, Masahiro Hatanaka, Hirokazu Miyoshi, Tsutomu Yoshihara

A 10-b 50 MS/s 500-mW A/D converter using a differential-voltage subconverter

Authors: Takahiro Miki, Hiroyuki Kouno, Toshio Kumamoto, Yasushi Kinoshita, Takayuki Igarashi, Keisuke Okada

A well-synchronized sensing/equalizing method for sub-1.0-V operating advanced DRAMs

Authors: Tsukasa Ooishi, Mikio Asakura, Shigeki Tomishima, Hideto Hidaka, Kazutami Arimoto, Kazuyasu Fujishima

250 Mbyte/s synchronous DRAM using a 3-stage-pipelined architecture

Authors: Yasuhiro Takai, Mamoru Nagase, Mamoru Kitamura, Yasuji Koshikawa, Naoyuki Yoshida, Yasuaki Kobayashi, Takashi Obara, Yukio Fukuzo, Hiroshi Watanabe

Open/folded bit-line arrangement for ultra-high-density DRAM's

Authors: Daisaburo Takashima, Shigeyoshi Watanabe, Hiroaki Nakano, Yukihito Oowaki, Kazunori Ohuchi

Standby/active mode logic for sub-1-V operating ULSI memory

Authors: Daisaburo Takashima, Shigeyoshi Watanabe, Hiroalu Nakano, Yukihito Oowaki, Kazunori Ohuchi, Hiroyuki Tango

A 120-MHz BiCMOS superscalar RISC processor

Authors: Shigeya Tanaka, Takashi Hotta, Fumio Murabayashi, Hiromichi Yamada, Shoji Yoshida, Kotaro Shimamura, Koyo Katsura, Tadaaki Bandoh, Koichi Ikeda, Kenji Matsubara, Kouji Saitou, Tetsuo Nakano, Teruhisa Shimizu, Ryuichi Satomura

Sub-1-μA dynamic reference voltage generator for battery-operated DRAMs

Authors: Hitoshi Tanaka, Yoshinobu Nakagome, Jun Etoh, Eiji Yamasaki, Masakazu Aoki, Kazuyuki Miyazawa

An efficient back-bias generator with hybrid pumping circuit for 1.5-V DRAMs

Authors: Yasuhiko Tsukikawa, Takeshi Kajimoto, Yasuhiko Okasaka, Yoshikazu Morooka, Kiyohiro Furutani, Hiroshi Miyamoto, Hideyuki Ozaki

High-bit-rate, high-input-sensitivity decision circuit using Si bipolar technology

Authors: Kiyoshi Ishii, Haruhiko Ichino, Yoshiji Kobayashi, Chikara Yamaguchi

Analysis and optimization of BiCMOS gate circuits

Authors: Tadahiro Kuroda, Yoshinori Sakata, Kenji Matsuo

BiCMOS circuit technology for a 704 MHz ATM switch LSI

Authors: Yusuke Ohtomo, Sadayuki Yasuda, Minoru Togashi, Massyuki Ino, Yasuyuki Tanabe, Jun-ichi Inoue, Masafumi Nogawa, Sshigeki Hino

A charge recycle refresh for Gb-scale DRAM's in file applications

Authors: Takayulu Kawahara, Yoshiki Kawajiri, Masashi Horiguchi, Takesada Akiba, Goro Kitsukawa, Tokuo Kure, Masakazu Aoki

GaAs DCFL 2.5 Gbps 16-bit Multiplexer/Demultiplexer LSI's

Authors: Norio Higashisaka, M. Shimada, Akira Ohta, Kenji Hosogi, Y. Tobita, Y. Mitsui

Maximum operating frequency in Si bipolar master-slave toggle flip-flop circuit

Authors: Kiyoshi Ishii, Haruhiko Ichino, Chikara Yamaguchi

Subthreshold-current reduction circuits for multi-gigabit DRAM's

Authors: Takeshi Sakata, Kiyoo Itoh, Masashi Horiguchi, Masakazu Aoki

Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's

Authors: Takeshi Sakata, Kiyoo Itoh, Masashi Horiguchi, Masakazu Aoki

Frequency mixer with a frequency doubler for integrated circuits

Authors: Katsuji Kimura and Hiroshi Asazawa

A 3.5 V, 1.3 W GaAs power multi-chip IC for cellular phones

Authors: Masahiro Maeda, Masaaki Nishijima, Hiroyasu Takehara, Chinatsu Adachi, Hiromasa Fujimoto, Osamu Ishikawa

A voltage compensated series-gate bipolar circuit operating at sub-2 V

Authors: Hisayasu Sato, Kimio Ueda, Nagisa Sasaki, Tatsuhiko Ikeda, Koichiro Mashiko

An experimental 256-Mb DRAM with boosted sense-ground scheme

Authors: Mikio Asakura, Tsukasa Ooishi, Masaki Tsukude, Shigeki Tomishima, Takahisa Eimori, Hideto Hidaka, Yoshikazu Ohno, Kazutani Arimoto, Kazuyasu Fujishima, Tadashi Nishimura, Tsutomu Yoshihara

A 256-Mb DRAM with 100 MHz serial I/O ports for storage of moving pictures

Authors: Hisakazu Kotani, Hironori Akamatsu, Yasushi Naito, Toyokazu Fujii, Tohru Iwata, Toshiaki Tsuji, Yutaka Itoh, Norisato Shimizu, Junji Hirase, Yoshiyuki Shibata, Kazuhiro Yamashita, Takashi Hori, Tsutomu Fujita

A 220-MHz pipelined 16-Mb BiCMOS SRAM with PLL proportional self-timing generator

Authors: Kazuyuki Nakamura, Shigeru Kuhara, Tohru Kimura, Masahide Takada, Hisamitsu Suzuki, Hiroshi Yoshida, Tohru Yamazaki

An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

Authors: Katsuhiro Suma, Takahiro Tsuruda, Hideto Hidaka, Takahisa Eimori, Toshiyuki Oashi, Yasuo Yamaguchi, Toshiaki Iwamatsu, Masakazu Hirose, Fukashi Morishita, Kazutarni Arimoto, Kazuyasu Fujishima, Yasuo Inoue, Tadashi Nishimura, Tsutomu Yoshihara

A 1.5-ns 256-kb BiCMOS SRAM with 60-ps 11-K logic gates

Authors: Nobuo Tamba, Akio Anzai, Kazuhiro Akimoto, Masayuki Ohayashi, Toshiro Hiramoto, Tadanori Kokubu, Sohei Ohmori, Tetsuya Muraya, Atsuyuki Kishimoto, Sousuke Tsuji, Hideki Hayashi, Nadateru Handa, Toshio Igarashi, Hiroaki Nambu, Makoto Yoshida, Tsuyoshi Fujiwara, Kunihiko Watanabe, Akihisa Uchida, Masanori Odaka, Kunihiko Yamaguchi, Takahide Ikeda

A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory

Authors: Tomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara

A 32-bank 256-Mb DRAM with cache and TAG

Authors: Satoru Tanoi, Yasuhiro Tanaka, Tetsuya Tanabe, Akio Eta, Toshio Inada, Ryoji Hamazaki, Yoshio Ohtsuki, Masaru Uesugi

A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM

Authors: Nobuyuki Yamashita, Tohru Kimura, Yoshihiro Fujita, Yoshiharu Aimoto, Takashi Manabe, Shin'ichiro Okazaki, Kazuyuki Nakamura, Masakazu Yamashina

A 10 bit 20 MS/s 3 V supply CMOS A/D converter

Authors: Masao Ito, Takahiro Miki, Shiro Hosotani, Toshio Kumamoto, Yukihiro Yamashita, Masaki Kijima, Takashi Okuda, Keisuke Okada

A 200 MHz 13 mm2 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme

Authors: Masataka Matsui, Hiroyuki Hara, Yoshiharu Uetani, Lee-Sup Kim, Tetsu Nagamatsu, Yoshinori Watanabe, Akihiko Chiba, Kouji Matsuda, Takayasu Sakurai

A 20 GHz 8 bit multiplexer IC implemented with 0.5 μm WNx/W-gate GaAs MESFET's

Authors: Toshiki Seshita, Yoshiko Ikeda, Hirotsugu Wakimoto, Kenji Ishida, Toshiyuki Terada, Tokuhiko Matsunaga, Takashi Suzuki, Yoshiaki Kitaura, Naotaka Uchitomi

A design technique for a 60 GHz-bandwidth distributed baseband amplifier IC module

Authors: Tsugumichi Shibata, Shunji Kimura, Hideaki Kimura, Yuhki Imai, Yohtaro Umeda, Yukio Akazawa

Si-analog IC's for 20 Gb/s optical receiver

Authors: Masaaki Soda, Hiroshi Tezuka, Fumihiko Sato, Takasuke Hashimoto, Satoshi Nakamura, Tom Tatsumi, Tetsuyuki Suzaki, Tsutomu Tashiro

A 500 MHz, 32 bit, 0.4 μm CMOS RISC processor

Authors: Kazumasa Suzuki, Masakazu Yamashina, Takashi Nakayama, Masanori Izumikawa, Masahiro Nomura, Hiroyuki Igura, Hideki Heiuchi, Junichi Goto, Toshiaki Inoue, Youichi Koseki, Hitoshi Abiko, Kazuhiro Okabe, Atsuki Ono, Youich Yano, Hachiro Yamada

A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC

Authors: Masaki Toyokura, Hisahi Kodama, Eiji Miyagoshi, Koyoshi Okamoto, Masahiro Gion, Takayuki Minemaru, Akihiko Ohtani, Toshiyuki Araki, Hiroshi Takeno, Toshihide Akiyama, Brent Wilson, Kunitoshi Aono

This list is based on the data extracted from dblp: IEEE J. Solid State Circuits

High-quality subband codec for HDTV transmission

Authors: Kazunari Irie, Yasuyuki Okumura, Naoya Sakurai, Ryozo Kishimoto

Analysis and synthesis of facial image sequences in model-based image coding

Authors: Chang Seok Choi, Kiyoharu Aizawa, Hiroshi Harashima, Tsuyoshi Takebe

A switched model-based coder for video signals

Authors: Mohammed Foysol Chowdhury, Adrian F. Clark, Andy C. Downton, Eishi Morimatsu, Donald E. Pearson

A wavelet codec with overlapped motion compensation for very low bit-rate environment

Authors: Jiro Katto, Jun-ichi Ohki, Satoshi Nogaki, Mutsumi Ohta

Motion compensation based on spatial transformations

Authors: Yuichiro Nakaya and Hiroshi Harashima

Estimation of camera parameters from image sequence for model-based video coding

Authors: Jong-Il Park, Nobuyuki Yagi, Kazumasa Enami, Kiyoharu Aizawa, Mitsutoshi Hatori

Architectural design of a bi-level image high speed codec

Authors: Hitoshi Horie, Tohru Ozaki, Hideyuki Shirai, Yasuo Iizuka

This list is based on the data extracted from dblp: IEEE Transactions Circuits Systems Video Technol.

Acoustic echo-canceler using the FBAF algorithm

Authors: Mohammad Reza Asharif and Fumio Amano

Transmission performance of 64 kbps switched digital international ISDN connections

Authors: Yutaka Yamamoto, Fumio Inumaru, Steven D. Akers, Ken-ichi Nishimura

A new artificial speech signal for objective quality evaluation of speech coding systems

Authors: Kenzo Itoh, Nobuhiko Kitawaki, Hiroshi Irii, Hiromi Nagabuchi

Error states and synchronization recovery for variable length codes

Authors: Yasuhiro Takishima, Masahiro Wada, Hitomi Murakami

A scalable motion-compensated subband image coder

Authors: Kenji Tsunashima, Joseph B. Stampleman, V. Michael Bove Jr.

This list is based on the data extracted from dblp: IEEE Transactions Communications

Accurate Ronding Scheme for the Newton-Raphson Method Using Redundant Binary Representation

Authors: Hideyuki Kabuo, Takashi Taniguchi, Akira Miyoshi, Hitoshi Yamashita, Miki Urano, Hisakazu Edamatsu, Shigeo Kuninobu

High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits

Authors: Shoji Kawahito, Makoto Ishida, Tetsuro Nakamura, Michitaka Kameyama, Tatsuo Higuchi

On Polynomial-Time Testable Combinational Circuits

Authors: Nageswara S. V. Rao and Shunichi Toida

This list is based on the data extracted from dblp: IEEE Transactions Computers

Application of digital signal processors for industrial magnetic bearings

Authors: Hannes Bleuler, Conrad Ghler, Raoul Herzog, Ren Larsonneur, Takeshi Mizuno, Roland Siegwart, Shao-Ju Woo

This list is based on the data extracted from dblp: IEEE Transactions Control. Systems Technol.

Application of neural networks to radar image classification

Authors: Yoshihisa Hara, Robert G. Atkins, Simon H. Yueh, Robert T. Shin, Jin Au Kong

Synthetic aperture FM-CW radar applied to the detection of objects buried in snowpack

Authors: Yoshio Yamaguchi, Masashi Mitsumoto, Masakazu Sengoku, Takeo Abe

Airborne active and passive microwave observations of Super Typhoon Flo

Authors: James R. Wang, Robert Meneghini, Hiroshi Kumagai, Thomas Wilheit, Wayne C. Boncyk, Paul Racette, Jeffrey R. Tesmer, B. Maves

Multidimensional analysis method for NOAA AVHRR images

Authors: Jun-ichi Kudoh, Goutam Chakraborty, Yoshiaki Nemoto, Norio Shiratori, Hiroshi Kawamura, Seiziro Obata, Shoichi Noguchi

Retrieval algorithms for stratospheric aerosols based on ADEOS/ILAS measurements

Authors: Sonoyo Mukai, Itaru Sano, Yasuhiro Sasano, Makoto Suzuki, Tatsuya Yokota

Neural network approach to land cover mapping

Authors: Tomoji Yoshida and Sigeru Omatu

This list is based on the data extracted from dblp: IEEE Transactions Geosci. Remote. Sens.

A development of symmetric extension method for subband image coding

Authors: Hitoshi Kiya, Kiyoshi Nishikawa, Masahiro Iwahashi

This list is based on the data extracted from dblp: IEEE Transactions Image Processing

Real-time omnidirectional image sensor (COPIS) for vision-guided navigation

Authors: Yasushi Yagi, Shinjiro Kawato, Saburo Tsuji

Robotic assembly operation teaching in a virtual environment

Authors: Hiroyuki Ogata and Tomoichi Takahashi

Adaptive robust control of robot manipulators-theory and experiment

Authors: Jun-ichi Imura, Toshiharu Sugie, Tsuneo Yoshikawa

This list is based on the data extracted from dblp: IEEE Transactions Robotics Autom.

IRISTER - magneto-optical disk for magnetically induced SuperResolution

Authors: Masahiko Kaneko, Katsuhisa Aratani, Atsushi Fukumoto, Senri Miyaoka

Latest advances in camcorder technology

Authors: Yukio Kubota, Yoshio Mshi, Kenji Shintani, Tetsuo Urabe, Keiichiro Shimada, Toru Katsumoto

Applications of fuzzy sets and approximate reasoning

Authors: Daniel G. Schwartz, George J. Klir, Harold W. Lewis III, Yoshinori Ezawa

Design of a 74-MHz antenna for radio astronomy

Authors: William A. Coles, Rod Frehlich, Masayoshi Kojima

Japanese deep-space station with 64-m-diameter antenna fed through beam waveguides and its mission applications

Authors: Tomonao Hayashi, Toshimitsu Nishimura, Tadashi Takano, Shin-Ichi Betsudan, Saburo Koshizaka

The Nobeyama radioheliograph

Authors: Hiroshi Nakajima, Masanori Nishio, Shinzo Enome, Kiyoto Shibasaki, Toshiaki Takano, Yoichiro Hanaoka, Chikayoshi Torii, Hideaki Sekiguchi, Takeshi Bushimata, Susumu Kawashima, Noriyuki Shinohara, Yoshihisa Irimajiri, Hideki Koshiishi, Takeo Kosugi, Yasuhiko Shiomi, Masaki Sawa, Keizo Ka

A 45-m telescope with a surface accuracy of 65 μm

Authors: Nobuharu Ukita and Masato Tsuboi

Optical computing techniques for image/video compression

Authors: Akitoshi Yoshida and John H. Reif

Active and nonlinear wave propagation devices in ultrafast electronics and optoelectronics

Authors: Mark J. W. Rodwell, Scott T. Allen, Ruai Y. Yu, Michael G. Case, Uddalak Bhattacharya, Madhukar Reddy, Eric Carman, Masayuki Kamegawa, Yoshiyuki Konishi, Joe Pusl, Rajasekhar Pullela

Estimation, identification, and sensorless control in motion control system

Authors: Kouhei Ohnishi, Nobuyuki Matsui, Yoichi Hori

The rewritable MiniDisc system

Author: Tadao Yoshida

P-OPALS: pure optical-parallel array logic system

Authors: Jun Tanida, Tsuyoshi Konishi, Yoshiki Ichioka

This list is based on the data extracted from dblp: Proc. IEEE