This webpage may contain errors. Please do NOT trust the following list, although the maintainer has tried his best to correct the mistakes. If you find an error, please contact the maintainer via email at “contact [at] ishikawa.cc”.

Highly contributed researchers in 1995

Yoshinobu Nakagome (5)

Katsuro Sasaki (4) / Toshiaki Yamanaka (4) / Minoru Togashi (4) / Takashi Nishida (3)

Propagation measurements and models for wireless communications channels

Authors: Jrgen Bach Andersen, Theodore S. Rappaport, Susumu Yoshida

Time division multiple access methods for wireless personal communications

Authors: David D. Falconer, Fumiyuki Adachi, Bjrn Gudmundson

Network issues for wireless communications

Authors: Bijan Jabbari, Giovanni Colombo, Akihisa Nakajima, Jayant Kulkarni

Spread spectrum access methods for wireless communications

Authors: Ryuji Kohno, Reuven Meidan, Laurence B. Milstein

Overview of wireless personal communications

Authors: Jay E. Padgett, Christoph G. Gnther, Takeshi Hattori

A multi-faceted approach to forecasting broadband demand and traffic

Authors: Margaret Hopkins, Graham Louth, Hilary Bailey, Ronnie Yellon, Ade Ajibulu, Mari Niva

SDH network evolution in Japan

Authors: Hidetoshi Miura, Kazumitsu Maki, Kazuhiro Nishihata

An implementation of a TMN-based SDH management system in Japan

Authors: Kazuo Yamagishi, Noriyuki Sasaki, Kazuyoshi Morino

State- and time-dependent routing in the NTT network

Authors: Konosuke Kawashima and Akiya Inoue

Standardization of network technologies and services

Authors: Koichi Asatani and Shinya Nogami

Self-healing virtual path architecture in ATM networks

Authors: Ryutaro Kawamura and Ikuo Tokizawa

Multiple-availability-level ATM network architecture

Authors: Eiji Oki, Naoaki Yamanaka, Francis Pitcho

DUET: an agent-based personal communications network

Authors: Ichiro Iida, Takashi Nishigaya, Koso Murakami

ATM signaling transport network architectures and analysis

Authors: Tsong-Ho Wu, Noriaki Yoshikai, Hiroyuki Fujii

This list is based on the data extracted from dblp: IEEE Communications Magazine

A variable precharge voltage sensing

Authors: Toshiaki Eirihata, Sang H. Dhong, Lewis M. Terman, Toshio Sunaga, Yoischi Taira

Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops

Authors: Kiyoshi Ishii, Haruhiko Ichino, Minoru Togashi, Yoshiji Kobayashi, Chikara Yamaguchi

Constant-current circuit-biasing technology for GaAs FET IC

Authors: Nobuo Kotera, Kiichi Yamashita, Keiichi Kitamura, Yasushi Hatta

Measurement of digital noise in mixed-signal integrated circuits

Authors: Keiko Makie-Fukuda, Takafumi Kikuchi, Tatsuji Matsuura, Masao Hotta

An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC

Authors: Katsufumi Nakamura, Masso Hotta, L. Richard Carley, David J. Allstot

A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates

Authors: Koji Nii, Hideshi Maeno, Tokuya Osawa, Shuhei Iwade, Shinpei Kayano, Hiroshi Shibata

A 4.4 ns CMOS 54⨉54-b multiplier using pass-transistor multiplexer

Authors: Norio Ohkubo, Makoto Suzuki, Toshinobu Shinbo, Toshiaki Yamanaka, Akihiro Shimizu, Katsuro Sasaki, Yoshinobu Nakagome

Asynchronous transfer mode switching LSI chips with 10-Gb/s serial I/O ports

Authors: Shigeki Hino, Minoru Togashi, Kimiyoshi Yamasaki

Data-dependent logic swing internal bus architecture for ultralow-power LSI's

Authors: Mitsuru Hiraki, Hirotsugu Kojima, Hitoshi Misawa, Takashi Akazawa, Yuji Hatano

A 6-ns 4-Mb CMOS SRAM with offset-voltage-insensitive current sense amplifiers

Authors: Koichiro Ishibashi, Koichi Takasugi, Kunihiro Komiyaji, Hiroshi Toyoshima, Toshiaki Yamanaka, Akira Fukami, Naotaka Hashimoto, Nagatoshi Ohki, Akihiro Shimizu, Takashi Hashimoto, Takahiro Nagano, Takashi Nishida

ATM in B-ISDN communication systems and VLSI realization

Authors: Takeo Koinuma and Noriharu Miyaho

Half-swing clocking scheme for 75% power saving in clocking circuitry

Authors: Hirotsugu Kojima, Satoshi Tanaka, Katsuro Sasaki

Cache-processor coupling: a fast and wide on-chip data cache design

Authors: Masato Motomura, Toshiaki Inoue, Hachiro Yamada, Akihiko Konagaya

A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM

Authors: Hiroalu Nambu, Kazuo Kanetani, Youji Idei, Tom Masuda, Keiichi Higeta, Masayuki Ohayashi, Masami Usami, Kunihiko Yamaguchi, Toshiyuki Kikuchi, Takahide Ikeda, Kenichi Ohhata, Takeshi Kusunoki, Noriyuki Homma

An automatic temperature compensation of internal sense ground for subquarter micron DRAM's

Authors: Tsukasa Ooishi, Yuichiro Komiya, Kei Hamade, Mho Asakura, Kenichi Yasuda, Kiyohiro Furutani, Hideto Hidaka, Hiroshi Miyamoto, Hideyuki Ozaki

A 2.6-ns wave-pipelined CMOS SRAM with dual-sensing-latch circuits

Authors: Suguru Tachibana, Hisayuki Higuchi, Koichi Takasugi, Katsuro Sasaki, Toshiaki Yamanaka, Yoshinobu Nakagome

Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications

Authors: Tohru Kimura, Kazuyuki Nakamura, Yoshiharu Aimoto, Takashi Manabe, Nobuyuki Yamashita, Yoshihiro Fujita, Shin'ichiro Okazaki, Masakazu Yamashina

A BiCMOS wired-OR logic

Authors: Yasunobu Nakase, Hiroaki Suzuki, Hiroshi Makino, Hirofumi Shinohara, Koichiro Mashiko

A 3.0 V 40 Mb/s hard disk drive read channel IC

Authors: Geert A. De Veirman, Shunsaku Ueda, Jackie Cheng, Stephen Tam, Kiyoshi Fukahori, Masafumi Kurisu, Eiji Shinozaki

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

Authors: Shin'ichiro Mutoh, Takakuni Douseki, Yasuyuki Matsuya, Takahko Aoki, Satoshi Shigematsu, Junzo Yamada

A neuron-MOS neural network using self-learning-compatible synapse circuits

Authors: Tadashi Shibata, Hideo Kosaka, Hiroshi Ishii, Tadahiro Ohmi

Principle and applications of an autocharge-compensated sample and hold circuit

Authors: Takeshi Shima, Tetsuro Itakura, Shigeru Yamada, Hironori Minamizaki, Takeshi Ishioka

A 2/3-in 2 million pixel STACK-CCD HDTV imager

Authors: Hirofumi Yamashita, Michio Sasaki, Shinji Ohsawa, Ryohei Miyagawa, Eiji Ohba, Keiji Mabuchi, Nobuo Nakamura, Nagataka Tanaka, Nahoko Endoh, Ikuko Inoue, Yoshiyuki Matsunaga, Yoshitaka Egawa, Yukio Endo, Tetsuya Yamaguchi, Yoshinori Iida, Akihiko Furukawa, Sohei Manabe, Yoshiki Ishizuka, Hideo Ichinose, Takako Niiyama, Hisanori Ihara, Hidetoshi Nozaki, Isamu Yanase, Naoshi Sakuma, Takeo Sakakubo, Hiroki Honda, Fujio Masuoka, Okio Yoshida, Hiroyuki Tango, Shun-ichi Sano

DC to 40-GHz broad-band amplifiers using AlGaAs/GaAs HBT's

Authors: Yasuhiko Kuriyama, Junko Akagi, Tohru Sugiyama, Sadato Hongo, Kunio Tsuda, Norio Iizuka, Masao Obara

A 40-GHz D-type flip-flop using AlGaAs/GaAs HBT's

Authors: Y. Kuriyama, T. Sugiyama, S. Hongo, J. Akagi, K. Tsuda, N. Iizuka, M. Obara

A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-μm GaAs MESFET

Authors: Koichi Murata, Taiichi Otsuji, Eiichi Sano, Masanobu Ohhata, Minoru Togashi, Masao Suzuki

GaAs converter IC's for C-band DBS receivers

Authors: Sadayoshi Yoshida, Kazunari Satoh, Tatsuya Miya, Takeshi Umemoto, Hiromitsu Hirayama, Katsunori Miyagaki, Joseph Leong

A 300-MHz 4-Mb wave-pipeline CMOS SRAM using a multiphase PLL

Authors: Koichiro Ishibashi, Kunihiro Komiyaji, Hiroshi Toyoshima, Masataka Minami, Nagatoshi Ohki, Hiroshi Ishida, Toshiaki Yamanaka, Takahiro Nagano, Takashi Nishida

A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM

Authors: Yoshihisa Iwata, Ken-ichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Hideko Oodaira, Masaki Momodomi, Yasuo Itoh, Toshiharu Watanabe, Hitoshi Araki, Kazuhito Narita, Kazunori Masuda, Junichi Miyamoto

An experimental 295 MHz CMOS 4K⨉256 SRAM using bidirectional read/write shared sense amps and self-timed pulsed word-line drivers

Authors: Natsuki Kushiyama, Charles Tan, Richard Clark, Jane Lin, Fred Perner, Lisa Martin, Mark Leonard, Gene Coussens, Kit Cham

A 64-b microprocessor with multimedia support

Authors: Lavi Lev, Andy Charnas, Marc Tremblay, Alexander Dalal, Bruce A. Frederick, Chakra R. Srivatsa, David Greenhill, Dennis L. Wendell, Duy Dinh Pham, Eric Anderson, Hemraj K. Hingarh, Inayat Razzack, James M. Kaku, Ken Shin, Marc E. Levitt, Michael Allen, Philip A. Ferolito, Richard L. Bartolotti, Robert K. Yu, Ronald J. Melanson, Shailesh I. Shah, Sophie Nguyen, Sundari S. Mitra, Vinita Reddy, Vidyasagar Ganesan, Willem J. de Lange

A 1.6 Gbyte/s data transfer rate 8 Mb embedded DRAM

Authors: Shinji Miyano, Kenji Numata, Katsuhiko Sato, Tomoaki Yabe, Masaharu Wada, Ryo Haga, Motohiro Enkaku, Masazumi Shiochi, Yutaka Kawashima, Masayuki Iwase, Masahisa Ohgata, Junpei Kumagai, Takeshi Yoshida, Masaomi Sakurai, Seiji Kaki, Narutoshi Yanagiya, Hiroshi Shinya, Tohm Fumyama, Paul Hansen, Marc Hannah, Michael Nagy, Anan Nagarajan, Mana Rungsea

A 1 ns, 1 W, 2.5 V, 32 Kb NTL-CMOS SRAM macro using a memory cell with PMOS access transistors

Authors: Hitoshi Okamura, Hideo Toyoshima, Koichi Takeda, Takashi Oguri, Satoshi Nakamura, Masahide Takada, Kiyotaka Imai, Yasushi Kinoshita, Hiroshi Yoshida, Tom Yamazaki

An experimental 220-MHz 1-Gb DRAM with a distributed-column-control architecture

Authors: Takeshi Sakata, Masashi Horiguchi, Tomonori Sekiguchi, Shigeki Ueda, Hitoshi Tanaka, Eiji Yamasaki, Yoshinobu Nakagome, Masakazu Aoki, Toru Kaga, Makoto Ohkura, Ryo Nagai, Fumio Murai, Toshihiko Tanaka, Shimpei Iijima, Natsuki Yokoyama, Yasushi Gotoh, Ken'ichi Shoji, Teruaki Kisu, Hisaomi Yamashita, Takashi Nishida, Eiji Takeda

A 1-Gb DRAM for file applications

Authors: Tadahiko Sugibayashi, Isao Naritake, Satoshi Utsugi, Kentaro Shibahara, Ryuichi Oikawa, Hidemitsu Mori, Shouichi Iwao, Tatsunori Murotani, Kuniaki Koyama, Shinichi Fukuzawa, Toshiro Itani, Kunihiko Kasama, Takashi Okuda, Shuichi Ohya, Masaki Ogawa

Low voltage circuit design techniques for battery-operated and/or giga-scale DRAMs

Authors: Tadato Yamagata, Shigeki Tomishima, Masaki Tsukude, Takahiro Tsuruda, Yasushi Hashizume, Kazutami Arimoto

A circuit technology for a self-refresh 16 Mb DRAM with less than 0.5 μA/MB data-retention current

Authors: Hiroyuki Yamauchi, Tom Iwata, Akito Uno, Masanori Fukumoto, Tsutomu Fujita

A 10 Mb frame buffer memory with Z-compare and A-blend units

Authors: Kazunari Inoue, Hisashi Nakamura, Hiroyuki Kawai

3.5-Gb/s⨉4-ch Si bipolar LSI's for optical interconnections

Authors: Noboru Ishihara, Shuichi Fujita, Minoru Togashi, Shigeki Hino, Yoshimitsu Arai, Nobuyuki Tanaka, Yoshiji Kobayashi, Yukio Akazawa

A half-pel precision MPEG2 motion-estimation processor with concurrent three-vector search

Authors: Kazuya Ishihara, Shinichi Masuda, Shin-ichi Hattori, Hirofumi Nishikawa, Yoshihide Ajioka, Tsuyoshi Yamada, Hiroyuki Amishiro, Shin-ichi Uramoto, Masahiko Yoshimoto, Tadashi Sumi

A 22-kHz multibit switched-capacitor sigma-delta D/A converter with 92 dB dynamic range

Authors: Peicheng Ju, Ken Suyama, Paul F. Ferguson Jr., Wai Lee

High reliability electron-ejection method for high density flash memories

Authors: Takayuki Kawahara, Naoki Miyamoto, Syun-ichi Saeki, Yusuke Jyouno, Masataka Kato, Katsutaka Kimura

Low-noise, high-speed data transmission using a ringing-canceling output buffer

Authors: Tomonori Sekiguchi, Masashi Horiguchi, Takeshi Sakata, Yoshinobu Nakagome, Shigeki Ueda, Masakazu Aoki

A 2.7-4.5 V single chip GSM transceiver RF integrated circuit

Authors: Trudy D. Stetzler, Irving G. Post, Joseph H. Havens, Mikio Koyama

A CMOS gate array with 600 Mb/s simultaneous bidirectional I/O circuits

Authors: Toshiro Takahashi, Makio Uchida, Takahiko Takahashi, Ryozo Yoshino, Masakazu Yamamoto, Nobuh Kitamura

A 2 V, 10 b, 20 Msample/s, mixed-mode subranging CMOS A/D converter

Authors: Michio Yotsuyanagi, Hiroshi Hasegawa, Motoi Yamaguchi, Masaki Ishida, Kazuya Sone

This list is based on the data extracted from dblp: IEEE J. Solid State Circuits

Comments on "On the robust Popov criterion for interval Lur"e systems

Authors: Takehiro Mori, T. Nishimura, Yasuaki Kuroe, Hideki Kokame

On solving Diophantine equations by real matrix manipulation

Authors: Manabu Yamada, Piao Chung Zun, Yasuyuki Funahashi

Robust controller design for delay systems in the gap-metric

Authors: Akira Kojima and Shintaro Ishijima

μ -synthesis of an electromagnetic suspension system

Authors: Masayuki Fujita, Toru Namerikawa, Fumio Matsumura, Kenko Uchida

Prediction of track purity and track accuracy in dense target environments

Authors: Shozo Mori, Kuo-Chu Chang, Chee-Yee Chong, Keh-Ping Dunn

The infimal controllable and N-observable superpredicate of a given predicate

Authors: Shigemasa Takai, Toshimitsu Ushio, Shinzo Kodama

Hankel norm of sampled-data systems

Authors: Krit Chongsrid and Shinji Hara

Static-state feedback control of discrete-event systems under partial observation

Authors: Shigemasa Takai, Toshimitsu Ushio, Shinzo Kodama

This list is based on the data extracted from dblp: IEEE Transactions Autom. Control.

Reversible variable length codes

Authors: Yasuhiro Takishima, Masahiro Wada, Hitomi Murakami

ATM data transmission systems based on N-ISDN

Authors: Changzheng Wang, Masahiro Numa, Kotaro Hirano

Depth-first coding for multivalued pictures using bit-plane decomposition

Authors: Sei-ichiro Kamata, Richard O. Eason, Eiji Kawaguchi

A multirate acoustic echo canceler structure

Authors: Fumio Amano, Hctor M. Prez Meana, Adriano de Luca, Gonzalo Duchen-Sanchez

Quantum communication with three coherent states

Authors: Tomohiko Uyematsu and Cherif Bendjaballah

Performance limitation of the leaky bucket algorithm for ATM networks

Authors: Naoaki Yamanaka, Youichi Sato, Ken-ichi Sato

Block permutation coding of images using cosine transform

Authors: Zhongshu Ji, Katsumi Tanaka, Shinzo Kitamura

On the Performance of Multicarrier DS CDMA Systems

Authors: Shiro Kondo and Laurence B. Milstein

A multicast hybrid ARQ scheme using MDS codes and GMD decoding

Authors: Katsumi Sakakibara and Masao Kasahara

This list is based on the data extracted from dblp: IEEE Transactions Communications

Neuro fuzzy transmission control for automobile with variable loads

Authors: Koki Hayashi, Yoshinao Shimizu, Yasuhiko Dote, Akira Takayama, Atsushi Hirako

Arbitrary path tracking control of articulated vehicles using nonlinear control theory

Authors: Mitsuji Sampei, Takeshi Tamura, Tadaharu Kobayashi, Nobuhiro Shibui

CMAC neural network controller for fuel-injection systems

Authors: Hitoshi Shiraishi, Susan L. Ipri, Dong-Il Dan Cho

This list is based on the data extracted from dblp: IEEE Transactions Control. Systems Technol.

Two-dimensional and full polarimetric imaging by a synthetic aperture FM-CW radar

Authors: Yoshio Yamaguchi, Toru Nishikawa, Masakazu Sengoku, Wolfgang-Martin Boerner

Application of neural networks for sea ice classification in polarimetric SAR images

Authors: Yoshihisa Hara, Robert G. Atkins, Robert T. Shin, Jin Au Kong, Simon H. Yueh, Ronald Kwok

Depolarization of radar signals due to multiple scattering in rain

Authors: Shigeo Ito, Tomohiro Oguchi, Toshio Iguchi, Hiroshi Kumagai, Robert Meneghini

Monitoring of rice crop growth from space using the ERS-1 C-band SAR

Authors: Takashi Kurosu, Masaharu Fujita, Kazuo Chiba

Development of an active radar calibrator for the TRMM precipitation radar

Authors: Hiroshi Kumagai, Toshiaki Kozu, Makoto Satake, Hiroshi Hanado, Ken'ichi Okamoto

This list is based on the data extracted from dblp: IEEE Transactions Geosci. Remote. Sens.

On the size of arcs in projective spaces

Authors: A. H. Ali, J. W. P. Hirschfeld, Hitoshi Kaneta

Parameter estimation with multiterminal data compression

Authors: Te Sun Han and Shun-ichi Amari

Fast decoding of algebraic-geometric codes up to the designed minimum distance

Authors: Shojiro Sakata, Jrn Justesen, Y. Madelung, Helge Elbrnd Jensen, Tom Hholdt

Competitive optimality of source codes

Authors: Hirosuke Yamamoto and Tadaaki Itoh

This list is based on the data extracted from dblp: IEEE Transactions Inf. Theory

Inverse filter design and equalization zones in multichannel sound reproduction

Authors: Philip Arthur Nelson, Felipe Ordua-Bustamante, Hareo Hamada

Weighted RLS adaptive beamformer with initial directivity

Authors: Futoshi Asano, Yiti Suzuki, Toshio Sone

Adaptive cepstral analysis of speech

Authors: Keiichi Tokuda, Takao Kobayashi, Satoshi Imai

This list is based on the data extracted from dblp: IEEE Transactions Speech Audio Processing

Trends in low-power RAM circuit technologies

Authors: Kiyoo Itoh, Katsuro Sasaki, Yoshinobu Nakagome

Cameras and display systems

Authors: Yoshitaka Hashimoto, Masanobu Yamamoto, Takashi Asaida

Present status of three-dimensional television research

Authors: Toshio Motoki, Haruo Isono, Ichiro Yuyama

Digital video recording

Authors: Masuo Umemoto, Yoshizumi Eto, Takahiko Fukinuki

This list is based on the data extracted from dblp: Proc. IEEE